A liquid crystal display (LCD) is a flat panel display with a property of low power consumption, and in comparison with a cathode ray tube (CRT) display of the same window dimension, the liquid crystal display is greatly decreased in either occupied space or weight and never has a curved panel as the conventional CRT display. Hence, the liquid crystal display has been widely applied in all sorts of manufactures, including consumptive electronic products such as pocket calculators, electronic dictionaries, watches, mobile phones, portable notebooks, communication terminal, display panels, desk-top personal computers, and even high dpi (dots per inch) televisions (HDTV) etc. The most popular display is a thin film transistor liquid crystal display (TFT-LCD) of active matrix type due to the fact that the viewing angle and contrast characteristics of the TFT-LCD are better than those of a super-twisted nematic liquid crystal display (STN-LCD) of passive matrix type, and that the TFT-LCD shows more rapid response (such as several tens of milliseconds) than the STN-LCD does (such as several hundred milliseconds).
Furthermore, for TFT-LCD is concerned, an amorphous silicon has mostly in a long term been a choice of material for a thin film transistor (TFT) to fabricate the TFT-LCD. However, now a polysilicon is used to be a substitute for the amorphous silicon for the TFT and may become a mainstream. This is because the polysilicon has a carrier (either electron or hole) mobility higher than that of the amorphous silicon. Additionally, the polysilicon TFT has an advantage of simultaneously forming the driving circuit (including nMOS transistors or pMOS transistors and even CMOS transistors) on the LCD panel during the fabrication of pixels. As a result of the above-mentioned, the polysilicon-type TFT-LCD can be switched at higher speed than the amorphous-type silicon TFT-LCD and is more attractive.
The polysilicon TFT-LCD is not perfect. For instance, when the TFT is at the off-state, often there is still a large drain leakage current. However, it can usually be overcome by the technique of a lightly doped drain (LDD) or a dual gate structure. The U.S. Pat. No. 5,940,151 invented by Yong-Min Ha etc. is one example.
The fabricating method of Ha's patent is briefly described as follows: Firstly, please refer to FIG. 1A, which is a plan view illustrating a pixel portion of a TFT-LCD. A signal line 40 and a scanning line 50 vertically intersect each other as shown in FIG. 1A, wherein the scanning line 50 is directly connected to a gate electrode 14 of the pixel TFT portion and the signal line 40 is connected to a source electrode 11S (as shown in FIG. 1B) at the pixel TFT. Storage capacitor electrodes 17 and 18 are connected to a drain electrode 11D of the pixel TFT. The upper electrode of the storage capacitor is connected to the outside of the pixel, that is, the contact region of the top capacitor electrode 18 is outside of the pixel. A pixel electrode 15 is also connected to the drain electrode 11D of the pixel TFT.
FIGS. 1B to 1E are cross-sectional views including a series of fabrication processes for a pixel (taken along line a—a′ of FIG. 1A) and the drive circuit thereof. First of all, an N-type heavily doped silicon layer and a metal layer are sequentially formed on an insulating substrate 1000. Then, through a photolithography and an etching technique (a first photo mask), source and drain electrode regions 11S and 11D of the pixel TFT are defined wherein the drain region 11D includes a first storage capacitor electrode 17, and source and drain electrode regions 21S and 21D of the N-type TFT are also defined at the drive circuit. A silicon thin film is subsequently formed on the overall surface over the substrate. Thereafter, the silicon thin film is defined by a photolithography and an etching technique (a second photo mask) to form a predetermined region 10′ for a channel 10 and a lightly doped drain (LDD) 12 of the pixel TFT and another predetermined region 20n′ for a channel 20n and a lightly doped drain (LDD) 22 of a N-type TFT, wherein the defined silicon regions 10′ and 20n′ are superposed on the corresponding source/drain regions thereof to form electrical connections. Moreover, the silicon thin film is also defined to form the other predetermined region 20p′ for a channel 20p and source/drain electrodes 23S, 23D of a P-type TFT.
Referring to FIG. 1C, an oxide layer and a gate metal layer are sequentially formed over the substrate. Then, a gate electrode 14, a storage capacitor dielectric layer 100 and a storage capacitor top electrode 18 of the pixel TFT are defined by a photolithography and etching technique (a third photo mask). Simultaneously, at the drive circuit portion, a gate electrode 24n of the N-type TFT and a gate electrode 24p of the P-type TFT are defined. Thereafter, N-type impurities are lightly doped into the substrate including the pixel TFT and the N-type TFT and the P-type TFT at the drive circuit.
Turning to the cross-sectional view shown in FIG. 1D, a photoresist pattern 63 is formed (a fourth photo mask) to cover the N-type TFT at the pixel and drive circuit portions and to bare the silicon thin film of the P-type TFT. Then, P-type conductive impurities are implanted to form source and drain electrodes 23S and 23D of the P-type TFT. Thereafter, the photoresist pattern 63 is removed. As shown in FIG. 1E, a passivation layer 300 is deposited on the overall surface over the substrate and then, contact holes are formed by a photolithography and an etching technique (a fifth photo mask) respectively at the pixel portion and the drive circuit portion. Thereafter, an ITO is deposited on the overall surface over the substrate including the passivation layer 300 and the contact holes. Finally, a pixel electrode 15 is defined by a photolithography and etching technique (a sixth photo mask) and connected to the storage capacitor and the pixel TFT, and simultaneously, a transparent conductive line 25 is formed for connecting the P-type TFT and the N-type TFT at the drive circuit.